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TECH TALK
A journal of bus architecture tips & techniques
Executive Summary: Flash Quality
By Alan Fitzgerald, Chief Technology Officer |
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| Disturb Errors Disturb errors occur when operations to one flash block influence the integrity of nearby flash blocks. The effected cell of the unintended disturb error is not involved with the intentional read, write, or erase operation. The disturb event is detected during a subsequent read operation by an ECC (Error Detection and Correction Algorithm) comparison between the ECC stored in the flash block during the last write operation and the ECC calculated by the current read operation. When an ECC error is detected the data is corrected and either rewritten to the existing flash block, or written to a different erased flash block. This operation is handled internal to the flash media and is transparent to the host. |
Write Endurance
The one common issue of concern to most media designers is write endurance. Media write integrity of a flash device now greatly exceeds that of a magnetic disk drive; however this comparison is rarely acknowledged.
Data is stored on a flash device by the injection and depletion of a charge on a floating gate. Each time a write or erase operation occurs, there is an infinitesimal breakdown of the oxide layer on the floating gate that holds the data bit charge. This phenomenon doesn’t occur in a read operation. This slow breakdown eventually degrades the cell where it does not allow an exchange of a charge and can no longer be erased or written to. In early years of flash technology “Write Endurance” was limited to only a few thousand cycles but over the years semiconductor manufacturers have improved this technology where typical limits of a flash cell endurance now vary between 300,000 and 2 million erase/write cycles depending on the technology.
Qualification
Adtron performs rigorous test and qualification procedures to characterize write endurance, disturb, and defect management. This validates the published specifications and characterizes the true capability of the flash media. As in hard drives, flash manufacturers extend the life of the flash device by utilizing internal algorithmic techniques. Two techniques commonly in practice today are known as sector sparing and wear leveling. Both are very effective methods of significantly extending the life of a flash device and allowing continuous operation by effective defect management through automatic replacement and balanced media utilization. Both techniques have their own unique attributes based on how the media is used.
Sector Sparing
Sector Sparing techniques reserve a percentage of the total flash capacity for new flash cells to replace those that fail due to erase/write endurance or other failure conditions. This method allows recovery from soft errors that would otherwise become hard errors and thus protects against a loss of data. Unlike wear leveling, logical sector assignments are tied to specific physical sectors until a sector failure forces the logical sector reassignment to a new or spare flash sector. Write performance remains consistent during the life of a sector. A very minor performance impact is experienced only during the time required to assign a new flash sector for a failed sector. Sector sparing algorithms provide excellent system efficiency.
Sector sparing is also used by hard drives, however disks spare only on a track basis with a small number of spares. Once the spares are consumed, a hard failure occurs, as the drive does not re-map sectors beyond the track. Flash sparing techniques are not as limited, allowing flash to spare across a wide area of the flash capacity.
Wear Leveling
Wear Leveling techniques spread the write activity evenly by moving logical sectors across the
physical flash sectors. This spreading process occurs as a part of the management of erase zones and is transparent to the host. Wear leveling also employs spare sector methods, and reserves a percentage of the raw flash capacity to replace bad sectors. Wear leveling is a proactive approach to sparing whereby each addressable sector wears out evenly across the capacity or portion of the capacity of a flash disk. This is due to the fact that the logical to physical mapping is revised routinely instead of in response to a flash cell failure event. This technique is very effective in avoiding disturb conditions due to the spreading of high access read and write conditions.
Combining wear leveling and sector sparing extends the effective number of system flash erase/write cycles. Sector sparing as a stand-alone technique manages only concentrated write areas by replacing worn out cells.
Currently Adtron flash disks use wear leveling and sector sparing to balance out the number of
erase/write cycles and manage defects. Given the dynamic nature of flash device technology, Adtron evaluates the specific system applications and performance requirements, and characterizes flash operation against the application requirements. Adtron implements the best method to deliver the highest quality and most reliable flash drives to the customer application.
Testing
Adtron invests significant resources to test flash technology iteration of flash media, its defect
management, and drives. The objective is to qualify manufacturing components and to empirically
quantify statistical data as flash technology advances. The test conditions, algorithms, and procedures vary based on the flash technology and significant sample sizes are used in each test. With full consideration to system operation and careful modeling of the high write sector characteristics, these tests enable Adtron to extrapolate and predict the life of a flash drive in a particular application.
Write endurance testing documentation (See Adtron Flash Write Endurance Test Summary) describes write cycles in varied test conditions. On-going in-house lab testing has shown write endurance of well over the 2,250,000 write cycle mark. This testing is being done utilizing multiple 32MB drives and localizing write activity to very small percentages of the mapped capacity to purposefully stress the flash cells and accelerate write cycle time. Each drive has over 4.25 billion blocks written without hard failures.
Accelerated life testing serves to validate an MTBF predicted using MIL-HDBK-217 and Belcore. (See Adtron Flash Drive Accelerated Life Test Summary) This is also a continuous process whereby multiple drives are dynamically tested for aging with high read and write activity at 65°C. Current tests, based on the activation energies of the flash drive components as predicted by the Arrenhius equation now reflect in excess of 50-year life equivalents at 25°C with no hard failures.
Summary
Flash technology has made impressive advances over the years. It has evolved from what once was considered an EPROM replacement or short term solution to a highly reliable long term storage solution. Adtron’s commitment to full test and qualification continually validates and tests flash under multiple application conditions. This empirical data collection is an on going process that reaffirms flash media as a proven, highly reliable storage technology.
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